phy PowerON周り
RTL838x# # rtk phyreg set 22 0xfff 30 3 Set Port 22 page 4095 reg 30 val: 0x0003 RTL838x# # rtk phyreg get 22 0 16 Get Port 22 page 00 reg 16 val: 0x1940 <----- RTL838x# # rtk phyreg set 22 0xfff 30 1 Set Port 22 page 4095 reg 30 val: 0x0001 RTL838x# # rtk phyreg get 22 0xa40 16 Get Port 22 page 2624 reg 16 val: 0x1940 <----- RTL838x# # rtk phyreg set 22 0xfff 30 0 Set Port 22 page 4095 reg 30 val: 0x0000 RTL838x# # rtk network on Enable network Force port28 link up 1G Please wait for PHY init-time ... RTL838x# # rtk phyreg set 22 0xfff 30 3 Set Port 22 page 4095 reg 30 val: 0x0003 RTL838x# # rtk phyreg get 22 0 16 Get Port 22 page 00 reg 16 val: 0x1140 <----- RTL838x# # rtk phyreg set 22 0xfff 30 1 Set Port 22 page 4095 reg 30 val: 0x0001 RTL838x# # rtk phyreg get 22 0xa40 16 Get Port 22 page 2624 reg 16 val: 0x1140 <----- RTL838x# # rtk phyreg set 22 0xfff 30 0 Set Port 22 page 4095 reg 30 val: 0x0000
